New HarwareSerial files for current IDE (1.8.x)
This commit is contained in:
277
AP-Remote-Software/HardwareSerial9bit/HardwareSerial.cpp
Normal file
277
AP-Remote-Software/HardwareSerial9bit/HardwareSerial.cpp
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/*
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HardwareSerial.cpp - Hardware serial library for Wiring
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Copyright (c) 2006 Nicholas Zambetti. All right reserved.
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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||||
License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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||||
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||||
This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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||||
Lesser General Public License for more details.
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||||
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||||
You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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Modified 23 November 2006 by David A. Mellis
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Modified 28 September 2010 by Mark Sproul
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Modified 14 August 2012 by Alarus
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Modified 3 December 2013 by Matthijs Kooijman
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//--- Modified 21 December 2017 by Sherzaad
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list of changes:
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- _tx_udr_empty_irq(void) function updated to make possible 9-bit serial TX
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- begin function updated to allow 9 bit serial configuration
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- read/write functions updated to support 9 bit serial
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---//
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include "Arduino.h"
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#include "HardwareSerial.h"
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#include "HardwareSerial_private.h"
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// this next line disables the entire HardwareSerial.cpp,
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// this is so I can support Attiny series and any other chip without a uart
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#if defined(HAVE_HWSERIAL0) || defined(HAVE_HWSERIAL1) || defined(HAVE_HWSERIAL2) || defined(HAVE_HWSERIAL3)
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// SerialEvent functions are weak, so when the user doesn't define them,
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// the linker just sets their address to 0 (which is checked below).
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// The Serialx_available is just a wrapper around Serialx.available(),
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// but we can refer to it weakly so we don't pull in the entire
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// HardwareSerial instance if the user doesn't also refer to it.
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#if defined(HAVE_HWSERIAL0)
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void serialEvent() __attribute__((weak));
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bool Serial0_available() __attribute__((weak));
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#endif
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#if defined(HAVE_HWSERIAL1)
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void serialEvent1() __attribute__((weak));
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bool Serial1_available() __attribute__((weak));
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#endif
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#if defined(HAVE_HWSERIAL2)
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void serialEvent2() __attribute__((weak));
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bool Serial2_available() __attribute__((weak));
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#endif
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#if defined(HAVE_HWSERIAL3)
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void serialEvent3() __attribute__((weak));
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bool Serial3_available() __attribute__((weak));
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#endif
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void serialEventRun(void)
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{
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#if defined(HAVE_HWSERIAL0)
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if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
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#endif
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#if defined(HAVE_HWSERIAL1)
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if (Serial1_available && serialEvent1 && Serial1_available()) serialEvent1();
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#endif
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#if defined(HAVE_HWSERIAL2)
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if (Serial2_available && serialEvent2 && Serial2_available()) serialEvent2();
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#endif
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#if defined(HAVE_HWSERIAL3)
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if (Serial3_available && serialEvent3 && Serial3_available()) serialEvent3();
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#endif
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}
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// Actual interrupt handlers //////////////////////////////////////////////////////////////
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void HardwareSerial::_tx_udr_empty_irq(void)
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{
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// If interrupts are enabled, there must be more data in the output
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// buffer. Send the next byte
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_tx.val = _tx_buffer[_tx_buffer_tail];
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_tx_buffer_tail = (_tx_buffer_tail + 1) % SERIAL_TX_BUFFER_SIZE;
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if(bit_is_set(*_ucsrb, UCSZ02)){
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if(_tx.bytes[1]) sbi(*_ucsrb, TXB80);
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else cbi(*_ucsrb, TXB80);
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}
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*_udr = _tx.bytes[0];
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// clear the TXC bit -- "can be cleared by writing a one to its bit
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// location". This makes sure flush() won't return until the bytes
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// actually got written
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sbi(*_ucsra, TXC0);
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if (_tx_buffer_head == _tx_buffer_tail) {
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// Buffer empty, so disable interrupts
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cbi(*_ucsrb, UDRIE0);
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}
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}
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// Public Methods //////////////////////////////////////////////////////////////
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void HardwareSerial::begin(unsigned long baud, byte config)
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{
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// Try u2x mode first
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uint16_t baud_setting = (F_CPU / 4 / baud - 1) / 2;
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uint8_t config1 = config & 0x7F;
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*_ucsra = 1 << U2X0;
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// hardcoded exception for 57600 for compatibility with the bootloader
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// shipped with the Duemilanove and previous boards and the firmware
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// on the 8U2 on the Uno and Mega 2560. Also, The baud_setting cannot
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// be > 4095, so switch back to non-u2x mode if the baud rate is too
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// low.
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if (((F_CPU == 16000000UL) && (baud == 57600)) || (baud_setting >4095))
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{
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*_ucsra = 0;
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baud_setting = (F_CPU / 8 / baud - 1) / 2;
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}
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// assign the baud_setting, a.k.a. ubrr (USART Baud Rate Register)
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*_ubrrh = baud_setting >> 8;
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*_ubrrl = baud_setting;
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_written = false;
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//set the data bits, parity, and stop bits
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#if defined(__AVR_ATmega8__)
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config1 |= 0x80; // select UCSRC register (shared with UBRRH)
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#endif
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*_ucsrc = config1;
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sbi(*_ucsrb, RXEN0);
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sbi(*_ucsrb, TXEN0);
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sbi(*_ucsrb, RXCIE0);
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cbi(*_ucsrb, UDRIE0);
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// set the 9 bit character size if required
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if(bit_is_set(config,7)) sbi(*_ucsrb, UCSZ02);
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else cbi(*_ucsrb, UCSZ02);
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}
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void HardwareSerial::end()
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{
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// wait for transmission of outgoing data
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flush();
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cbi(*_ucsrb, RXEN0);
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cbi(*_ucsrb, TXEN0);
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cbi(*_ucsrb, RXCIE0);
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cbi(*_ucsrb, UDRIE0);
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// clear any received data
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_rx_buffer_head = _rx_buffer_tail;
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}
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int HardwareSerial::available(void)
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{
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return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
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}
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int HardwareSerial::peek(void)
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{
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if (_rx_buffer_head == _rx_buffer_tail) {
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return -1;
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} else {
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return _rx_buffer[_rx_buffer_tail];
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}
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}
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int HardwareSerial::read(void)
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{
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// if the head isn't ahead of the tail, we don't have any characters
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if (_rx_buffer_head == _rx_buffer_tail) {
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return -1;
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} else {
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uint16_t c = _rx_buffer[_rx_buffer_tail];
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if(bit_is_clear(*_ucsrb, UCSZ02)) c = (uint8_t)_rx_buffer[_rx_buffer_tail];
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_rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
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return c;
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}
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}
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int HardwareSerial::availableForWrite(void)
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{
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#if (SERIAL_TX_BUFFER_SIZE>256)
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uint8_t oldSREG = SREG;
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cli();
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#endif
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tx_buffer_index_t head = _tx_buffer_head;
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tx_buffer_index_t tail = _tx_buffer_tail;
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#if (SERIAL_TX_BUFFER_SIZE>256)
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SREG = oldSREG;
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#endif
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if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
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return tail - head - 1;
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}
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void HardwareSerial::flush()
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{
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// If we have never written a byte, no need to flush. This special
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// case is needed since there is no way to force the TXC (transmit
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// complete) bit to 1 during initialization
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if (!_written)
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return;
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while (bit_is_set(*_ucsrb, UDRIE0) || bit_is_clear(*_ucsra, TXC0)) {
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if (bit_is_clear(SREG, SREG_I) && bit_is_set(*_ucsrb, UDRIE0))
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// Interrupts are globally disabled, but the DR empty
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// interrupt should be enabled, so poll the DR empty flag to
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// prevent deadlock
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if (bit_is_set(*_ucsra, UDRE0))
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_tx_udr_empty_irq();
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}
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// If we get here, nothing is queued anymore (DRIE is disabled) and
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// the hardware finished tranmission (TXC is set).
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}
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size_t HardwareSerial::write(uint16_t n)
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{
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_written = true;
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_tx.val = n & 0x1FF;
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// If the buffer and the data register is empty, just write the byte
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// to the data register and be done. This shortcut helps
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// significantly improve the effective datarate at high (>
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// 500kbit/s) bitrates, where interrupt overhead becomes a slowdown.
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if (_tx_buffer_head == _tx_buffer_tail && bit_is_set(*_ucsra, UDRE0)) {
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if(bit_is_set(*_ucsrb, UCSZ02)){
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// set the 9th bit character size if required
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if(_tx.bytes[1]) sbi(*_ucsrb, TXB80);
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else cbi(*_ucsrb, TXB80);
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}
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*_udr = _tx.bytes[0];
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sbi(*_ucsra, TXC0);
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return 1;
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}
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tx_buffer_index_t i = (_tx_buffer_head + 1) % SERIAL_TX_BUFFER_SIZE;
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// If the output buffer is full, there's nothing for it other than to
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// wait for the interrupt handler to empty it a bit
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while (i == _tx_buffer_tail) {
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if (bit_is_clear(SREG, SREG_I)) {
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// Interrupts are disabled, so we'll have to poll the data
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// register empty flag ourselves. If it is set, pretend an
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// interrupt has happened and call the handler to free up
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// space for us.
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if(bit_is_set(*_ucsra, UDRE0))
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_tx_udr_empty_irq();
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} else {
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// nop, the interrupt handler will free up space for us
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}
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}
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_tx_buffer[_tx_buffer_head] = _tx.val;
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_tx_buffer_head = i;
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sbi(*_ucsrb, UDRIE0);
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return 1;
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}
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#endif // whole file
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180
AP-Remote-Software/HardwareSerial9bit/HardwareSerial.h
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180
AP-Remote-Software/HardwareSerial9bit/HardwareSerial.h
Normal file
@@ -0,0 +1,180 @@
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/*
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HardwareSerial.h - Hardware serial library for Wiring
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Copyright (c) 2006 Nicholas Zambetti. All right reserved.
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This library is free software; you can redistribute it and/or
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||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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||||
|
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This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with this library; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
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|
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Modified 28 September 2010 by Mark Sproul
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Modified 14 August 2012 by Alarus
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Modified 3 December 2013 by Matthijs Kooijman
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//--- Modified 21 December 2017 by Sherzaad
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list of changes:
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- 9bit serial + 1 stop bit
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- 9bit serial + 2 stop bit
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- 9bit serial + even parity
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- 9bit serial + odd stop bit
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- _rx_buffer and _tx_buffer type change to unsigned int
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- new variables defined (_rx,_tx) to receive/transmit 9-bit serial
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- write function argument changed from uint8_t to uint16_t
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---//
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*/
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#ifndef HardwareSerial_h
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#define HardwareSerial_h
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#include <inttypes.h>
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#include "Stream.h"
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// Define constants and variables for buffering incoming serial data. We're
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// using a ring buffer (I think), in which head is the index of the location
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// to which to write the next incoming character and tail is the index of the
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// location from which to read.
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// NOTE: a "power of 2" buffer size is reccomended to dramatically
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// optimize all the modulo operations for ring buffers.
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// WARNING: When buffer sizes are increased to > 256, the buffer index
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// variables are automatically increased in size, but the extra
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// atomicity guards needed for that are not implemented. This will
|
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// often work, but occasionally a race condition can occur that makes
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// Serial behave erratically. See https://github.com/arduino/Arduino/issues/2405
|
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#if !defined(SERIAL_TX_BUFFER_SIZE)
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#if ((RAMEND - RAMSTART) < 1023)
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#define SERIAL_TX_BUFFER_SIZE 16
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#else
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#define SERIAL_TX_BUFFER_SIZE 64
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#endif
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#endif
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#if !defined(SERIAL_RX_BUFFER_SIZE)
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#if ((RAMEND - RAMSTART) < 1023)
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#define SERIAL_RX_BUFFER_SIZE 16
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#else
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#define SERIAL_RX_BUFFER_SIZE 64
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#endif
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#endif
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#if (SERIAL_TX_BUFFER_SIZE>256)
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typedef uint16_t tx_buffer_index_t;
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#else
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typedef uint8_t tx_buffer_index_t;
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#endif
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#if (SERIAL_RX_BUFFER_SIZE>256)
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typedef uint16_t rx_buffer_index_t;
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#else
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||||
typedef uint8_t rx_buffer_index_t;
|
||||
#endif
|
||||
|
||||
// Define config for Serial.begin(baud, config);
|
||||
#define SERIAL_5N1 0x00
|
||||
#define SERIAL_6N1 0x02
|
||||
#define SERIAL_7N1 0x04
|
||||
#define SERIAL_8N1 0x06
|
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#define SERIAL_9N1 0x86
|
||||
#define SERIAL_5N2 0x08
|
||||
#define SERIAL_6N2 0x0A
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||||
#define SERIAL_7N2 0x0C
|
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#define SERIAL_8N2 0x0E
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#define SERIAL_9N2 0x8E
|
||||
#define SERIAL_5E1 0x20
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#define SERIAL_6E1 0x22
|
||||
#define SERIAL_7E1 0x24
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#define SERIAL_8E1 0x26
|
||||
#define SERIAL_9E1 0xA6
|
||||
#define SERIAL_5E2 0x28
|
||||
#define SERIAL_6E2 0x2A
|
||||
#define SERIAL_7E2 0x2C
|
||||
#define SERIAL_8E2 0x2E
|
||||
#define SERIAL_9E2 0xAE
|
||||
#define SERIAL_5O1 0x30
|
||||
#define SERIAL_6O1 0x32
|
||||
#define SERIAL_7O1 0x34
|
||||
#define SERIAL_8O1 0x36
|
||||
#define SERIAL_9O1 0xB6
|
||||
#define SERIAL_5O2 0x38
|
||||
#define SERIAL_6O2 0x3A
|
||||
#define SERIAL_7O2 0x3C
|
||||
#define SERIAL_8O2 0x3E
|
||||
#define SERIAL_9O2 0xBE
|
||||
|
||||
class HardwareSerial : public Stream
|
||||
{
|
||||
protected:
|
||||
volatile uint8_t * const _ubrrh;
|
||||
volatile uint8_t * const _ubrrl;
|
||||
volatile uint8_t * const _ucsra;
|
||||
volatile uint8_t * const _ucsrb;
|
||||
volatile uint8_t * const _ucsrc;
|
||||
volatile uint8_t * const _udr;
|
||||
// Has any byte been written to the UART since begin()
|
||||
bool _written;
|
||||
|
||||
volatile rx_buffer_index_t _rx_buffer_head;
|
||||
volatile rx_buffer_index_t _rx_buffer_tail;
|
||||
volatile tx_buffer_index_t _tx_buffer_head;
|
||||
volatile tx_buffer_index_t _tx_buffer_tail;
|
||||
|
||||
// Don't put any members after these buffers, since only the first
|
||||
// 32 bytes of this struct can be accessed quickly using the ldd
|
||||
// instruction.
|
||||
unsigned int _rx_buffer[SERIAL_RX_BUFFER_SIZE];
|
||||
unsigned int _tx_buffer[SERIAL_TX_BUFFER_SIZE];
|
||||
union {
|
||||
uint16_t val;
|
||||
uint8_t bytes[2];
|
||||
} _rx,_tx;
|
||||
|
||||
public:
|
||||
inline HardwareSerial(
|
||||
volatile uint8_t *ubrrh, volatile uint8_t *ubrrl,
|
||||
volatile uint8_t *ucsra, volatile uint8_t *ucsrb,
|
||||
volatile uint8_t *ucsrc, volatile uint8_t *udr);
|
||||
void begin(unsigned long baud, uint8_t config = SERIAL_8N1);
|
||||
void end();
|
||||
virtual int available(void);
|
||||
virtual int peek(void);
|
||||
virtual int read(void);
|
||||
virtual int availableForWrite(void);
|
||||
virtual void flush(void);
|
||||
virtual size_t write(uint16_t);
|
||||
inline size_t write(uint8_t n) { return write((uint16_t)n); }
|
||||
inline size_t write(int n) { return write((uint16_t)n); }
|
||||
inline size_t write(unsigned long n) { return write((uint16_t)n); }
|
||||
inline size_t write(long n) { return write((uint16_t)n); }
|
||||
using Print::write; // pull in write(str) and write(buf, size) from Print
|
||||
operator bool() { return true; }
|
||||
|
||||
// Interrupt handlers - Not intended to be called externally
|
||||
inline void _rx_complete_irq(void);
|
||||
void _tx_udr_empty_irq(void);
|
||||
};
|
||||
|
||||
#if defined(UBRRH) || defined(UBRR0H)
|
||||
extern HardwareSerial Serial;
|
||||
#define HAVE_HWSERIAL0
|
||||
#endif
|
||||
#if defined(UBRR1H)
|
||||
extern HardwareSerial Serial1;
|
||||
#define HAVE_HWSERIAL1
|
||||
#endif
|
||||
#if defined(UBRR2H)
|
||||
extern HardwareSerial Serial2;
|
||||
#define HAVE_HWSERIAL2
|
||||
#endif
|
||||
#if defined(UBRR3H)
|
||||
extern HardwareSerial Serial3;
|
||||
#define HAVE_HWSERIAL3
|
||||
#endif
|
||||
|
||||
extern void serialEventRun(void) __attribute__((weak));
|
||||
|
||||
#endif
|
||||
137
AP-Remote-Software/HardwareSerial9bit/HardwareSerial_private.h
Normal file
137
AP-Remote-Software/HardwareSerial9bit/HardwareSerial_private.h
Normal file
@@ -0,0 +1,137 @@
|
||||
/*
|
||||
HardwareSerial_private.h - Hardware serial library for Wiring
|
||||
Copyright (c) 2006 Nicholas Zambetti. All right reserved.
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with this library; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
|
||||
Modified 23 November 2006 by David A. Mellis
|
||||
Modified 28 September 2010 by Mark Sproul
|
||||
Modified 14 August 2012 by Alarus
|
||||
//--- Modified 21 December 2017 by Sherzaad
|
||||
list of changes:
|
||||
- added definitions for UCSZ02, RXB80, TXB80
|
||||
- update _rx_complete_irq(void) to receive 9-bit serial
|
||||
---//
|
||||
*/
|
||||
|
||||
#include "wiring_private.h"
|
||||
// this next line disables the entire HardwareSerial.cpp,
|
||||
// this is so I can support Attiny series and any other chip without a uart
|
||||
#if defined(HAVE_HWSERIAL0) || defined(HAVE_HWSERIAL1) || defined(HAVE_HWSERIAL2) || defined(HAVE_HWSERIAL3)
|
||||
|
||||
// Ensure that the various bit positions we use are available with a 0
|
||||
// postfix, so we can always use the values for UART0 for all UARTs. The
|
||||
// alternative, passing the various values for each UART to the
|
||||
// HardwareSerial constructor also works, but makes the code bigger and
|
||||
// slower.
|
||||
#if !defined(TXC0)
|
||||
#if defined(TXC)
|
||||
// Some chips like ATmega8 don't have UPE, only PE. The other bits are
|
||||
// named as expected.
|
||||
#if !defined(UPE) && defined(PE)
|
||||
#define UPE PE
|
||||
#endif
|
||||
// On ATmega8, the uart and its bits are not numbered, so there is no TXC0 etc.
|
||||
#define TXC0 TXC
|
||||
#define RXEN0 RXEN
|
||||
#define TXEN0 TXEN
|
||||
#define RXCIE0 RXCIE
|
||||
#define UDRIE0 UDRIE
|
||||
#define U2X0 U2X
|
||||
#define UPE0 UPE
|
||||
#define UDRE0 UDRE
|
||||
#define UCSZ02 UCSZ2
|
||||
#elif defined(TXC1)
|
||||
// Some devices have uart1 but no uart0
|
||||
#define TXC0 TXC1
|
||||
#define RXEN0 RXEN1
|
||||
#define TXEN0 TXEN1
|
||||
#define RXCIE0 RXCIE1
|
||||
#define UDRIE0 UDRIE1
|
||||
#define U2X0 U2X1
|
||||
#define UPE0 UPE1
|
||||
#define UDRE0 UDRE1
|
||||
#define UCSZ02 UCSZ12
|
||||
#define RXB80 RXB81
|
||||
#define TXB80 TXB81
|
||||
#else
|
||||
#error No UART found in HardwareSerial.cpp
|
||||
#endif
|
||||
#endif // !defined TXC0
|
||||
|
||||
// Check at compiletime that it is really ok to use the bit positions of
|
||||
// UART0 for the other UARTs as well, in case these values ever get
|
||||
// changed for future hardware.
|
||||
#if defined(TXC1) && (TXC1 != TXC0 || RXEN1 != RXEN0 || RXCIE1 != RXCIE0 || \
|
||||
UDRIE1 != UDRIE0 || U2X1 != U2X0 || UPE1 != UPE0 || \
|
||||
UDRE1 != UDRE0 || UCSZ12 != UCSZ02)
|
||||
#error "Not all bit positions for UART1 are the same as for UART0"
|
||||
#endif
|
||||
#if defined(TXC2) && (TXC2 != TXC0 || RXEN2 != RXEN0 || RXCIE2 != RXCIE0 || \
|
||||
UDRIE2 != UDRIE0 || U2X2 != U2X0 || UPE2 != UPE0 || \
|
||||
UDRE2 != UDRE0 || UCSZ22 != UCSZ02)
|
||||
#error "Not all bit positions for UART2 are the same as for UART0"
|
||||
#endif
|
||||
#if defined(TXC3) && (TXC3 != TXC0 || RXEN3 != RXEN0 || RXCIE3 != RXCIE0 || \
|
||||
UDRIE3 != UDRIE0 || U3X3 != U3X0 || UPE3 != UPE0 || \
|
||||
UDRE3 != UDRE0 || UCSZ32 != UCSZ02)
|
||||
#error "Not all bit positions for UART3 are the same as for UART0"
|
||||
#endif
|
||||
|
||||
// Constructors ////////////////////////////////////////////////////////////////
|
||||
|
||||
HardwareSerial::HardwareSerial(
|
||||
volatile uint8_t *ubrrh, volatile uint8_t *ubrrl,
|
||||
volatile uint8_t *ucsra, volatile uint8_t *ucsrb,
|
||||
volatile uint8_t *ucsrc, volatile uint8_t *udr) :
|
||||
_ubrrh(ubrrh), _ubrrl(ubrrl),
|
||||
_ucsra(ucsra), _ucsrb(ucsrb), _ucsrc(ucsrc),
|
||||
_udr(udr),
|
||||
_rx_buffer_head(0), _rx_buffer_tail(0),
|
||||
_tx_buffer_head(0), _tx_buffer_tail(0)
|
||||
{
|
||||
}
|
||||
|
||||
// Actual interrupt handlers //////////////////////////////////////////////////////////////
|
||||
|
||||
void HardwareSerial::_rx_complete_irq(void)
|
||||
{
|
||||
|
||||
if (bit_is_clear(*_ucsra, UPE0)) {
|
||||
// No Parity error, read byte and store it in the buffer if there is
|
||||
// room
|
||||
|
||||
_rx.bytes[1] = bit_is_set(*_ucsrb,RXB80)>>RXB80; //get the 9th bit
|
||||
_rx.bytes[0] = *_udr ;
|
||||
|
||||
rx_buffer_index_t i = (unsigned int)(_rx_buffer_head + 1) % SERIAL_RX_BUFFER_SIZE;
|
||||
|
||||
// if we should be storing the received character into the location
|
||||
// just before the tail (meaning that the head would advance to the
|
||||
// current location of the tail), we're about to overflow the buffer
|
||||
// and so we don't write the character or advance the head.
|
||||
if (i != _rx_buffer_tail) {
|
||||
_rx_buffer[_rx_buffer_head] = _rx.val;
|
||||
_rx_buffer_head = i;
|
||||
}
|
||||
}
|
||||
else {
|
||||
bit_is_set(*_ucsrb,RXB80);
|
||||
// Parity error, read byte but discard it
|
||||
*_udr;
|
||||
}
|
||||
}
|
||||
|
||||
#endif // whole file
|
||||
Reference in New Issue
Block a user